Memory devices can be categorized into two broad areas: volatile and non-volatile. Volatile memory devices require power to maintain data, while non-volatile memories are capable of maintaining data in the absence of a power supply. An example of a non-volatile memory is the flash memory that stores information in a semiconductor device without the need for power to maintain the information in the chip.
Flash memory can be built using either NOR or NAND devices. NAND flash can be either of single-level cell (SLC) or multi-level cell (MLC) configuration. MLC NAND flash allows for a higher density memory device in comparison to SLC NAND flash because it allows the storage of two or more data bits in each memory cell.
Various memory operations, when performed on memory devices such as NAND flash memory devices, may need to be performed on an entire portion of the memory device in a same operation. For example, when performing an erase operation on a NAND flash memory, the erase operation may need to be performed on an entire block of memory, sometimes referred to as an erase block, as part of the same operation. Grouping one or more erase blocks together to form a group of erase blocks that can be operated on as a single block may speed up the memory operations, and may reduce the overhead required to manage and track the operations that include these grouping of erase block of a memory device. However, in some instances involving the grouping of erase blocks, if any one of the erase blocks in the group is determined to be defective, or fails at some time later in the life of the memory, the entire grouping of erase blocks that includes the defective erase block is marked as a defective block. These defective blocks that include grouping of erase blocks and may not be used by the device or devices using this memory in any memory operations. This results in wasted memory within a memory array, including wasting the good erase blocks that are grouped together with the defective erase block.
Various schemes to re-group the good erase blocks into usable groups including only non-defective erase blocks, and thus regain the use of these erase blocks may be performed. However, these schemes can become complicated to perform when testing and allocating the erase blocks, and the overhead associated with the management of these schemes during the actual memory operations may require a large amount of resources and processing time, which may lead to reduced speed and loss of other performance characteristics of the device that include the memory array incorporating one or more of these schemes. Thus, there is a need for improved apparatus, methods, and systems that allow grouping of erase blocks in a memory array that is simple to implement and reduces the amount of resources and overhead required to manage the memory operations performed on the memory array.